1. Field of the Invention
The present invention relates to computers that auto-configure peripheral devices connected thereto, and more particularly in determining the peripheral device bus number when another peripheral device bus is added which changes the original peripheral device bus number in the computer.
2. Description of the Related Technology
Use of computers, especially personal computers, in business and at home is becoming more and more pervasive because the computer has become an integral tool of most information workers who work in the fields of accounting, law, engineering, insurance, services, sales and the like. Rapid technological improvements in the field of computers have opened up many new applications heretofore unavailable or too expensive for the use of older technology mainframe computers. A significant part of the ever increasing popularity of the computer, besides its low cost relative to just a few years ago, is its ability to run sophisticated programs and perform many useful and new tasks. Computers today may be easily upgraded with new peripheral devices for added flexibility and enhanced performance.
A major advance in the performance of computers has been the implementation of sophisticated peripheral devices such as video graphics adapters, local area network interfaces, SCSI bus adapters, full motion video and the like. These sophisticated peripheral devices are capable of data transfer rates approaching the native speed of the computer central processing unit (xe2x80x9cCPUxe2x80x9d) or microprocessor. Tie peripheral devices data transfer speeds are achieved by connecting the peripheral devices to the microprocessor and associated random access memory through high speed expansion local buses. Most notably, a high speed expansion local bus standard has emerged that is microprocessor independent and has been embraced by a significant number of peripheral hardware manufacturers and software programmers. This high speed expansion bus standard is called the xe2x80x9cPeripheral Component Interconnectxe2x80x9d or xe2x80x9cPCI.xe2x80x9d A more complete definition of the PCI local bus may be found in the PCI Local Bus Specification, revision 2.1; PCI/PCI Bridge Specification, revision 1.0; PCI System Design Guide, revision 1.0; and PCI BIOS Specification, revision 2.1. These PCI specifications are available from the PCI Special Interest Group, P.O. Box 14070, Portland, Oreg. 97214.
A computer system has a plurality of informational (data and address) buses such as a host bus, a memory bus, at least one high speed expansion local bus such as the PCI bus, and other peripheral buses such as the Small Computer System Interface (SCSI), Extension to Industry Standard Architecture (EISA), and Industry Standard Architecture (ISA). The central processing unit (CPU) of the computer system communicates with main memory and with the peripherals that make up the computer system over these various buses. The main memory generally communicates over a memory bus through a cache memory bridge to the CPU host bus. The peripherals, depending on their data transfer speed requirements, are connected to the various buses which are connected to the CPU through bus bridges that detect required actions, arbitrate, and translate both data and addresses between the various buses. The choices available for the various computer system bus structures and devices residing on these buses are relatively flexible and may be organized in a number of different ways. One of the more desirable features of present day computer systems is their flexibility and ease in implementing custom solutions for users having widely different requirements.
Another advance in the flexibility and ease in the implementation of personal computers is the emerging xe2x80x9cplug and playxe2x80x9d standard in which each vendor""s hardware has unique coding embedded within the peripheral device. Plug and play software in the computer operating system software auto configures the peripheral devices found connected to the various computer buses such as the various PCI buses, EISA and ISA buses. In addition, the plug and play operating system software configures registers within the peripheral devices found in the computer system as to memory space allocation, interrupt priorities and the like.
Plug and play initialization generally is performed with a system configuration program that is run whenever a new device is incorporated into the computer system. Once the configuration program has determined the parameters for each of the devices in the computer system, these parameters may be stored in non-volatile random access memory (NVRAM). An industry standard for storage of both plug and play and non-plug and play device configuration information is the Extended System Configuration Data (ESCD) format. The ESCD format is used to store detailed configuration information in the NVRAM for each device. This ESCD information allows the computer system BIOS configuration software to work together with the configuration utilities to provide robust support for all peripheral devices, both plug and play, and non- plug and play.
During the first initialization of a computer, the system configuration utility determines the hardware configuration of the computer system including all peripheral devices connected to the various buses of the computer system. Some user involvement may be required for device interrupt priority and the like. Once the configuration of the computer system is determined, either automatically and/or by user selection of settings, the computer system configuration information is stored in ESCD format in the NVRAM. Thereafter, the system configuration utility need not be run again. This greatly shortens the startup time required for the computer system and does not require the computer system user to have to make any selections for hardware interrupts and the like, as may be required in the system configuration utility.
However, situations arise more and more often which require rerunning the system configuration utility to update the device configuration information stored in the NVRAM when a new device is added to the computer system. One specific situation is when a PCI peripheral device interface card having a PCI-PCI bridge is placed into a PCI connector slot of a first PCI bus of the computer system. The PCI-PCI bridge, which creates a new PCI bus, causes the PCI bus numbers of all subsequent PCI buses to increase by one (PCI-PCI bridge may be a PCI interface card having its own PCI bus for a plurality of PCI devices integrated on the card or for PCI bus connector slots associated with the new PCI bus). This creates a problem since any user configured information such as interrupt request (IRQ) number, controller order number, etc., stored in the NVRAM specifies the bus and device/function number of the PCI device to which it applies. Originally, this information was determined and stored in the NVRAM by the system configuration utility during the initial setup of the computer system and contains configuration choices made at that time.
During normal startup of the computer system (every time the computer is turned on by the user), a Power On Self Test (POST) routine depends on prior information stored in the NVRAM by the system configuration utility. If the PCI bus numbers of any of the PCI cards change because a new PCI bus was introduced by adding a new PCI-PCI bridge to the computer, the original configuration information stored in the NVRAM will not be correct for those PCI cards now having different bus numbers, even though they remain in the same physical slot numbers. This situation results in the software operating system not being able to configure the PCI cards now having bus numbers different than what was expected from the information stored in the NVRAM. This can be especially bothersome for a PCI device such as a controller which has been configured as a system startup device, but now cannot be used to startup the computer system because its registers have not been initialized during POST to indicate that it is supposed to be the primary controller.
What is needed is a way for the computer system, during POST, to determine that a PCI bus number has changed for an existing PCI device and to automatically update the computer startup software with the correct bus number so that a PCI device may be used to startup or boot the software operating system. In addition, it is desirable to store the correct bus number in NVRAM for those PCI devices whose bus numbers have changed.
It is therefore an object of the present invention to initially recognize existing PCI devices on startup even though their PCI bus numbers may have changed.
It is a further object of the present invention to update a computer system hardware configuration table with the correct bus numbers for existing PCI devices whose bus numbers have changed because a new PCI bus was introduced into the computer system.
It is a further object to use the physical card slot number of each PCI device as a reference when determining bus numbers of PCI devices to be configured during POST.
It is a further object to update the computer system NVRAM with a new PCI device bus number when that PCI device has the same physical card slot number but a different PCI bus number then expected.
It is a further object to recognize a PCI device as a startup or boot controller and configure its registers as such even though its PCI bus number has changed.
It is a further object to have a more complete plug and play solution when PCI bus numbers change after adding new PCI/PCI bridges that create new PCI bus numbers in a computer system.
The above and other objects of the present invention are satisfied, at least in part, when during initial computer system configuration the number of the physical card slot that a PCI card is inserted into is recorded as being associated with that PCI card and device(s). The computer system may then use this physical slot information in conjunction with the PCI device function number to make sure that the PCI bus number is correct prior to executing the PCI device initialization. If there is a change in the bus number of a PCI device which has not been moved from its original physical card slot, then the present invention automatically updates the computer system device information during POST without having to run a new system configuration operation. This gives a more complete plug and play solution even when a PCI device, whose bus address has been changed, must be used for computer system startup.
PCI devices are connected to the computer system CPU through at least one PCI bus. The at least one PCI bus is in communication with the host bus connected to the CPU through a Host/PCI bus bridge. There exists on the computer system motherboard a set of electrical card edge connector sockets or xe2x80x9cslotsxe2x80x9d adapted to receive one PCI card for each slot. These PCI card slots are numbered as to their physical location on the motherboard and define a unique characteristic for each of the respective PCI card slots and the PCI cards plugged therein. The PCI card slots may be interspersed with other ISA or EISA bus connector slots also located on the computer system motherboard.
The PCI bus closest to the CPU, i.e., the PCI bus just on the other side of the host/PCI bridge is always bus number zero. Thus, any PCI device card plugged into a PCI slot connected to the number zero PCI bus is defined as being addressable at PCI bus number zero. Each PCI card comprises at least one PCI device that is unique in the computer system. Each PCI device has a plurality of registers containing unique criteria such as Vender ID, Device ID, Revision ID, Class Code Header Type, etc. Other registers within each PCI device may be read from and written to so as to further coordinate operation of the PCI devices in the computer system. During system configuration,, each PCI device is discovered and its personality information such as interrupt request number, bus master priority, latency time and the like are stored in the system non-volatile random access memory (NVRAM) using, for example, the ESCD format.
The number of PCI cards that may be connected to a PCI bus is limited, however, because the PCI bus is configured for high speed data transfers. The PCI specification circumvents this limitation by allowing more than one PCI bus to exist in the computer system. A second PCI bus may be created by connecting another Host-to-PCI bridge to the host bus of the CPU. The second PCI bus connected to the down stream side (PCI bus side) of the second Host-to-PCI bridle is defined as xe2x80x9cnumber onexe2x80x9d if there are no other PCI/PCI bridges connected to the PCI bus number zero.
Other PCI buses may be created with the addition of PCI/PCI bridges. For example, a PCI card having a PCI/PCI bridge is plugged into a PCI slot connected to PCI bus number zero on the motlherboard of the computer system. In this example, bus number zero is the primary bus because the first host/PCI bridge""s PCI bus is always numbered zero. The upstream side of the PCI/PCI bridge is connected to PCI bus number zero and the down stream side of the PCI/PCI bridge now creates another PCI bus which is number one. The prior PCI bus number one on the down stream side of the second Host-to-PCI bus now must change to PCI bus number two. All PCI/PCI bridges connected to or down stream of PCI bus number zero are sequentially numbered. This causes the number of the PCI bus that was created by the second Host-to-PCI bridge to be incremented every time a new PCI bus is created with a PCI/PCI bridge down stream from PCI bus number zero.
When two PCI/PCI bridges are connected to the PCI bus number zero, two PCI buses, numbers one and two, are created. For example, a first PCI card having a PCI/PCI bridge is plugged into motherboard PCI slot number 1, creating PCI bus number one with the PCI/PCI bridge of the first PCI/PCI card. A second PCI card having a PCI/PCI bridge is plugged into motherboard PCI slot number 2, creating PCI bus number two with the PCI/PCI bridge of the second PCI card. PCI bus numbers one or two may be connected to PCI devices on the respective first and second PCI cards, or there may be additional PCI card slots on one or both of the first and second PCI cards. When slots are available on a PCI card having a PCI/PCI bridge, additional PCI cards having PCI/PCI bridges may be plugged into the PCI card slots, thus creating more PCI buses. Each PCI/PCI bridge handles information to and from the CPU host bus and a downstream PCI device according to the PCI Specifications referenced above. All embedded PCI devices on the computer system motherboard are assigned a physical slot number of zero (0) and must be differentiated by their respective PCI device and bus numbers.
A computer system may be configured initially with two Host-to-PCI bridges connected to the CPU host bus. This results in the creation of two PCI buses numbered zero and one. These two PCI buses are available for connecting the PCI devices used in the computer system to the CPU. The system configuration program is run once to establish the personality of each of the PCI devices connected to the two PCI buses, to define interrupt priorities and the like. The configuration information for each of the PCI devices and their associated PCI bus numbers may be stored in the NVRAM using the ESCD format. Thereafter each time the computer system is powered up, the configuration information stored in the NVRAM may be used for initializing and configuring the PCI devices during startup of the operating system and eventually running the application programs
Initial startup of the computer system is by programs stored in the computer system read only memory (ROM) basic input/output system (BIOS) whose contents may be written into random access memory (RAM) space along with the configuration information stored in the NVRAM so that the computer system may do its startup routines more quickly and then load the operating system software from its hard disk. During the POST routine the computer system depends on the configuration information stored in the NVRAM to access the PCI devices at the PCI bus numbers determined during execution of the original system configuration program.
All of the stored PCI device bus numbers in the NVRAM must match the actual PCI bus numbers for the PCI devices (hard disk SCSI interface, etc.) required during startup of the computer system. If the PCI bus numbers stored in the NVRAM do not match the actual PCI bus numbers, proper computer system operation may be impaired. PCI bus numbers may change if new PCI/PCI bridges are added to the computer system after the configuration program was run to store the system configuration settings in the NVRAM in ESCD format.
According to the present invention, during system configuration the physical PCI slot number is stored in the NVRAM using the PCI ESCD freeform information structure: ECD_PCIBRDID, offset byte 06h. The ECD_PCIBRDID structure also stores the PCI bus number, device/function number, device identifier and vendor identifier in offset bytes 00h, 01h, 021h and 04h, respectively, for each PCI device in the computer system.
The computer system ROM BIOS is configured to include the PCI BIOS function routines which provide a software interface to the computer hardware for implementing PCI devices in the computer. The PCI BIOS function routines are used for generating operations in the PCI specific address spaces (configuration space, and Special Cycles). One of these routines is the xe2x80x9cGet PCI Interrupt Routing Optionsxe2x80x9d which is used to return the PCI interrupt routing options available on the system motherboard. The routing information is returned to a data buffer that contains an IRQ routing for each PCI device slot. The IRQ routing table contains, among other entries, the PCI bus number, PCI device number, and PCI physical card slot number.
In the present invention, the PCI bus number, PCI device number and PCI physical slot number are found in both the ESCD freeform information structure ECD_PCIBRDID and IRQ routing table. During computer system startup, the PCI bus number in the IRQ routing table is updated for each PCI device. The ESCD freeform information structure ECD_PCIBRDID stored in the NVRAM, typically, is not updated during system startup. Thus, if a new PCI bus has been introduced into the computer system which alters some of the PCI bus numbers of the existing PCI devices, these bus numbers will not be the same as those stored in the ECD_PCIBRDID configuration. This could have catastrophic results if one of the PCI devices so affected was necessary to load the computer system operating software from hard disk or CD ROM. The present invention resolves the situation of not being able to configure PCI devices at startup if their bus numbers have changed since the last time the system configuration was stored in the ECD_PCIBRDID.
A feature of the present invention is that the startup ROM BIOS software routine checks the contents of the ECD_PCIBRDID against the contents of the IRQ routing table. When the bus numbers do not match for matching PCI device and slot numbers, the PCI device bus number stored in the IRQ routing table is used to replace the incorrect PCI device bus number stored in the NVRAM ESCD structure, ECD_PCIBRDID, In this way, the computer system ROM BIOS software finds the PCI devices which need to be configured for proper computer system startup, just as if the affected PCI device bus numbers had not been changed by the addition of a new PCI bus.
Typically, the contents of the ROM BIOS and NVRAM are copied during startup to the computer system high speed random access memory (RAM) connected to the CPU by the high speed memory bus. Another feature of the present invention is that any bus number changes found during POST of the contents of the IRQ routing table and ECD_PCIBRDID may be corrected by overwriting the RAM locations containing the incorrect bus numbers for the affected PCI devices. The computer system can then utilize the corrected bus numbers in the system RAM to perform the necessary steps for startup and proper operation of the computer system. This feature makes for a more robust and complete plug and play implementation of the computer system.
Still another feature of the present invention is updating the information stored in ESCD format, ECD_PCIBRDID, for each of the existing PCI device bus numbers based on the PCI bus number information found in the IRQ routing table available during early system startup. PCI devices introduced into the computer system which do not have the respective ESCD information stored in NVRAM must still be introduced into the computer system during execution of the system configuration program. However, once such PCI devices have been characterized as to their device and physical slot numbers, and this information is stored in the NVRAM, the present invention can correct for any changing bus number so long as the PCI devices do not change their respective physical slot positions.
An advantage of the present invention is that the introduction of a PCI card having a PCI/PCI bridge which changes PCI bus numbers of other existing PCI devices will not detrimentally effect operation of the computer system.
Another advantage of the present invention is that the computer system is able to safely tolerate more diverse configurations of PCI cards without losing its plug and play capabilities.
Still another advantage is to be able to differentiate between embedded PCI devices each having physical slot number zero by using the correct bus number for each embedded device and the respective xe2x80x9cDevsel#xe2x80x9d signal.